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Power Integrity and Noise Coupling in Integrated Circuits
EC ENGR X 457.56
This course covers the analysis and design of integrated circuits power delivery networks focusing on power integrity and noise coupling in chip, package, and printed circuit board (PCB) structures.
Analyze various aspects of noise coupling and power integrity in integrated circuits and identify the root cause of problems, and provide highly innovative and efficient solutions
Develop efficient power distribution networks, select the right decoupling capacitors, choose and implement the right noise coupling suppression techniques that match the corresponding noise coupling mechanisms in their specific applications
Choose the right set of simulation tools that cover all the existing power distribution and noise coupling mechanisms in their chip/package/PCB co-design
Identify power integrity and noise coupling problems early in the design process and come up with solutions and guidelines for reducing the noise generation in digital circuits, suppressing the noise propagation, and minimizing the noise injection into sensitive circuits
About this course:
This course covers the analysis and design of integrated circuits power delivery networks focusing on power integrity and noise coupling in chip, package and printed circuit board (PCB) structures. Topics include power delivery impedance in chip/package/PCB co-design, loop inductance, effective decoupling capacitors techniques, power delivery impedance variation with frequency and resonance peaks, noise generation in chip substrate and power delivery networks, noise propagation in various types of substrated and fabrication technologies, noise reception in sensitive circuits, noise coupling suppression techniques, and power integrity and noise coupling modeling and simulation. The learning approach balances qualitative and quantitative analysis methods with practical intuitive techniques for understanding the physical phenomena. Students are exposed to various practical examples and are guided to complete a design project in which they develop the power delivery network and simulate the power integrity and noise coupling effects in a chip/package/PCB integrated circuit structure.
Spring 2025 Schedule
Date & Time
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Format
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This section has no set meeting times.
Future Offering (Opens February 03, 2025 12:00:00 AM)
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